《数字逻辑设计实践》课程教学资源（文献资料）74151数据手册（CD74HCT151）

CD74HC151TEXASINSTRUMENTSCD74HCT151Data sheet acquired from Harris SemiconductorSCHS150HighSpeedCMOSLogic8-lnput MultiplexerSeptember1997Vcc=5VFeatures· HCTTypes.ComplementaryDataOutputs-4.5Vto5.5VOperationBuffered InputsandOutputs-DirectLSTTL Input Logic Compatibility,.Fanout (Over Temperature Range)ViL=0.8V (Max),ViH=2V (Min)-Standard Outputs...10LSTTLLoads-CMOS InputCompatibility,lj≤1uAatVoL,VoH-BusDriverOutputs.15LSTTLLoadsDescription. Wide Operating Temperature Range ... -55°c to 125cTheHarrisCD74HC151andCD74HCT151aresingle8-.Balanced PropagationDelayand Transition Timeschannel digital multiplexers having three binary control·SignificantPowerReductionComparedtoLSTTLinputs,S0,S1and S2andanactivelowenable (E)input.LogicICsThe three binary signals select 1 of 8 channels. Outputs areboth inverting (M)and non-inverting (M).AlternateSourceisPhilips/SigneticsHC TypesOrderingInformation-2Vto6VOperationPKG.-High Noise Immunity:NiL=30%, NiH=30%of Vcc atPARTNUMBERTEMP.RANGE(°C)PACKAGENO.PinoutCD74HC151,CD74HCT151(PDIP, SOIC)TOPVIEW50国vcc2回国4国51日国6Y回国国sOYas1D回s2GNDCAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.1645.1FileNumberCopyright Harris Corporation 19971

1 Data sheet acquired from Harris Semiconductor SCHS150 Features • Complementary Data Outputs • Buffered Inputs and Outputs • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • Alternate Source is Philips/Signetics • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30%of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH Description The Harris CD74HC151 and CD74HCT151 are single 8- channel digital multiplexers having three binary control inputs, S0, S1 and S2 and an active low enable (E) input. The three binary signals select 1 of 8 channels. Outputs are both inverting (Y) and non-inverting (Y). Pinout CD74HC151, CD74HCT151 (PDIP, SOIC) TOP VIEW Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE PKG. NO. 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 I3 I2 I1 I0 Y Y GND E VCC I5 I6 I7 S0 S1 S2 I4 September 1997 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1997 CD74HC151, CD74HCT151 High Speed CMOS Logic 8-Input Multiplexer File Number 1645.1 [ /Title (CD74H C151, CD74H CT151) /Subject (High Speed CMOS Logic 8- Input Multi-

CD74HC151,CD74HCT151FunctionalDiagram4lo31212513Y1561414-Y15131612711So10S19S2GND = 87Vcc=16ETRUTHTABLESELECTINPUTSDATA INPUTSENABLEOUTPUTEYI13YS2S1SO101214151617xxxxXxxxxxxHHLLLLxxxxxxxLHLLLHxxxxxxxLLHLLxxxxxxLHLLHLxLxxxxxHLLHxHxLLxxLxxxxxLHLHLLxxxHLHLxxHxxLLxxL?xxxHLHHxLLxHxxHHHxxxxLLLxxxxLLxLxxLHLHxXXxHxxxHHLLLLLHXxxXxLxxLHLHxxxxHxxHHLHXLLxxxxLLLHHLxxxHxxHHHLxxxxxLLHHXxxxxxxHHLLHLHHxxxxxxLLHHXHNOTE: H= High Voltage Level, L = Low Voltage Level, X = Don't Care2

2 Functional Diagram TRUTH TABLE SELECT INPUTS DATA INPUTS ENABLE OUTPUT S2 S1 S0 I0 I1 I2 I3 I4 I5 I6 I7 E Y Y XXXX X X X X X X X H H L LLLL XXXXXXX L HL LLLHXXXXXXX L LH LLHX L X X X X X X L H L LLHX H X X X X X X L L H LHLX X L X X X X X L H L LHLX X H X X X X X L L H LHHX X X L X X X X L H L LHHX X X H X X X X L L H HLLX X X X L X X X L H L HLLX X X X H X X X L L H HLHX X X X X L X X L H L HLHX X X X X H X X L L H HHL X X X X X X L X L H L HHL X X X X X X H X L L H HHHX X X X X X X L L H L HHHX X X X X X X H L L H NOTE: H = High Voltage Level, L = Low Voltage Level, X = Don’t Care 5 6 Y Y 4 3 2 1 14 12 13 15 I0 I7 I6 I5 I4 I3 I2 I1 11 S0 10 S1 9 S2 E 7 GND = 8 VCC = 16 CD74HC151, CD74HCT151

CD74HC151,CD74HCT151Thermal InformationAbsoluteMaximumRatingsDC SupplyVoltage,Vcc.JA(°C)-0.5Vto7VThermal Resistance (Typical,Note3)-.DC Input Diode Current, lik90PDIP Package.....For V,Vcc+0.5V......................±20mA115Soic Package.............DCOutputDiodeCurrent, lok-..150°℃Maximum Junction Temperature....ForVoVcc+0.5V.................+20mA.-65℃to150°℃Maximum Storage Temperature Range.........DOutputSourceorSinkCurrentperOutputPin,lo..........300℃Maximum Lead Temperature (Soldering 10s)..±25mAForVo>-0.5Vor Vo<Vcc+0.5V.........(SOIC -Lead Tips Only)DC Vcc or Ground Current, IcC orIGND.+50mA.Operating Conditions-55to125Temperature Range (TA)Supply Voltage Range, Vcc.....2Vto6VHC Types . ...... ...4.5Vto5.5VHCT Types ...DC Input or Output Voltage, Vj, Vo....ovto ccInput Rise and Fall Time2V.1000ns (Max)4.5V.500ns (Max)6V...400ns (Max)CAUTION:Stresses above those listed in"Absolute Maximum Ratings"may cause permanent damage to the device.This is a stress only rating and operationof the device at these orany other conditions above those indicated in the operational sections of this specification is not implied.NOTE:3. e jA is measured with the component mounted on an evaluation PC board in free air.DcElectricalSpecificationsTEST25°℃-40°CTO85°℃-55°CTO125°℃CONDITIONSVccSYMBOLMINTYPMAXMINMAXMINMAXPARAMETERV;(M)lo (mA)(M)UNITSHC TYPES2High Level InputVIH1.51.51.5V-----VoltageV4.53.153.153.15：.：64.24.24.2V----20.5vLow Level InputVIL0.50.5--.--Voltage1.351.35v4.51.35.---61.81.8·1.8V..-VHigh Level Output21.91.9-0.021.9VoHVIHor VIL----Voltagev0.024.54.44.44.4：--CMOS LoadsV0.0265.95.95.9----VHigh Level Output---------Voltage4.53.7v-43.983.84----TTLLoads5.2-5.265.485.34V·.2V0.020.10.10.1Low Level OutputVOLVIH OrVIL·---Voltage0.024.50.10.10.1V--.-CMOS Loads60.10.1V0.02：0.1--、VLow Level Output----.----Voltage44.50.260.330.4V·--.TTLLoads5.260.260.330.4V.-Vcc or6±0.1±1±1μAInput Leakage-：..--GNDCurrentQuiescentDeviceVccor06880160μAIcc.--CurrentGND3

3 Absolute Maximum Ratings Thermal Information DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V DC Input Diode Current, IIK For VI VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA DC Output Diode Current, IOK For VO VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA DC Output Source or Sink Current per Output Pin, IO For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA DC VCC or Ground Current, ICC or IGND . . . . . . . . . . . . . . . . . .±50mA Operating Conditions Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V DC Input or Output Voltage, VI , VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time 2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max) 6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max) Thermal Resistance (Typical, Note 3) θJA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 3. θJA is measured with the component mounted on an evaluation PC board in free air. DC Electrical Specifications PARAMETER SYMBOL TEST CONDITIONS VCC (V) 25oC -40oC TO 85oC -55oC TO 125oC VI (V) IO (mA) MIN TYP MAX MIN MAX MIN MAX UNITS HC TYPES High Level Input Voltage VIH - - 2 1.5 - - 1.5 - 1.5 - V 4.5 3.15 - - 3.15 - 3.15 - V 6 4.2 - - 4.2 - 4.2 - V Low Level Input Voltage VIL - - 2 - - 0.5 - 0.5 - 0.5 V 4.5 - - 1.35 - 1.35 - 1.35 V 6 - - 1.8 - 1.8 - 1.8 V High Level Output Voltage CMOS Loads VOH VIH or VIL -0.02 2 1.9 - - 1.9 - 1.9 - V -0.02 4.5 4.4 - - 4.4 - 4.4 - V -0.02 6 5.9 - - 5.9 - 5.9 - V High Level Output Voltage TTL Loads - - - - - - V -4 4.5 3.98 - - 3.84 - 3.7 - V -5.2 6 5.48 - - 5.34 - 5.2 - V Low Level Output Voltage CMOS Loads VOL VIH or VIL 0.02 2 - - 0.1 - 0.1 - 0.1 V 0.02 4.5 - - 0.1 - 0.1 - 0.1 V 0.02 6 - - 0.1 - 0.1 - 0.1 V Low Level Output Voltage TTL Loads - - - - - - V 4 4.5 - - 0.26 - 0.33 - 0.4 V 5.2 6 - - 0.26 - 0.33 - 0.4 V Input Leakage Current II VCC or GND - 6 - ±0.1 - ±1 - ±1 µA Quiescent Device Current ICC VCC or GND 0 6 - - 8 - 80 - 160 µA CD74HC151, CD74HCT151

CD74HC151,CD74HCT151DCElectricalSpecifications(Continued）TEST25°℃-40℃TO85°℃-55℃TO125℃CONDITIONSVccSYMBOLVi(M)lo (mA)MINTYPMAXMINMAXMINMAXPARAMETER(M)UNITSHCTTYPESHigh Level InputVIH4.5 to222>.-··--·5.5VoltageLow Level InputVIL4.5to0.80.80.8V?：--.Voltage5.5VHigh Level Output4.54.44.44.4-0.02VoHVIHorVIL----VoltageCMOS LoadsHigh LevelOutput-44.53.983.843.7v：---VoltageTTL LoadsLow Level Output0.024.50.10.10.1VVoLVIH orVIL.-VoltageCMOS LoadsVLow Level Output44.50.260.330.4----VoltageTTLLoadsInput Leakage105.5±0.1±1±1HAVccand-·-GNDCurrentQuiescent DeviceVccor05.5880160MAIcc----CurrentGNDAdditional QuiescentVcc4.5 to100360450490μAAIcC----Device Current Per-2.15.5Input Pin: 1 Unit LoadNOTE:For dual-supply systems theoretical worst case (M,=2.4VVcc=5.5V)specification is1.8mA.HCTInput Loading TableINPUTUNITLOADS1.5SelectData0.45 0.3EnableNOTE: Unit Load is Alcc limit specified in DC Electrical Table, e.g.,360μAmaxat 25°c.Switching Specifications Input t,t=6ns-40°℃TO-55°CTO25℃85℃125℃℃TESTTYPMAXMINMAXPARAMETERSYMBOLCONDITIONSVcc(M)MINMAXMINUNITSHCTYPESCL=50pF2170255Propagation Delay (Figure 1)--.215.nstPLH, tPHL344.54351nsAny Data Input toY----514-CL=15pF-ns.----6CL= 50pF293743ns---.4

4 HCT TYPES High Level Input Voltage VIH - - 4.5 to 5.5 2-2 - 2 - V Low Level Input Voltage VIL - - 4.5 to 5.5 - - 0.8 - 0.8 - 0.8 V High Level Output Voltage CMOS Loads VOH VIH or VIL -0.02 4.5 4.4 - - 4.4 - 4.4 - V High Level Output Voltage TTL Loads -4 4.5 3.98 - - 3.84 - 3.7 - V Low Level Output Voltage CMOS Loads VOL VIH or VIL 0.02 4.5 - - 0.1 - 0.1 - 0.1 V Low Level Output Voltage TTL Loads 4 4.5 - - 0.26 - 0.33 - 0.4 V Input Leakage Current II VCC and GND 0 5.5 - ±0.1 - ±1 - ±1 µA Quiescent Device Current ICC VCC or GND 0 5.5 - - 8 - 80 - 160 µA Additional Quiescent Device Current Per Input Pin: 1 Unit Load ∆ICC VCC -2.1 - 4.5 to 5.5 - 100 360 - 450 - 490 µA NOTE: For dual-supply systems theoretical worst case (VI = 2.4V, VCC = 5.5V) specification is 1.8mA. DC Electrical Specifications (Continued) PARAMETER SYMBOL TEST CONDITIONS VCC (V) 25oC -40oC TO 85oC -55oC TO 125oC VI (V) IO (mA) MIN TYP MAX MIN MAX MIN MAX UNITS HCT Input Loading Table INPUT UNIT LOADS Select 1.5 Data 0.45 Enable 0.3 NOTE: Unit Load is ∆ICC limit specified in DC Electrical Table, e.g., 360µA max at 25oC. Switching Specifications Input tr, tf = 6ns PARAMETER SYMBOL TEST CONDITIONS VCC (V) 25oC -40oC TO 85oC -55oC TO 125oC MIN TYP MAX MIN MAX MIN MAX UNITS HC TYPES Propagation Delay (Figure 1) tPLH, tPHL CL = 50pF 2 - - 170 - 215 - 255 ns Any Data Input to Y 4.5 - - 34 - 43 - 51 ns CL =15pF 5 - 14 - - - - - ns CL = 50pF 6 - - 29 - 37 - 43 ns CD74HC151, CD74HCT151

CD74HC151,CD74HCT151SwitchingSpecificationsInputt,t=6ns (Continued)-40°CTO-55CTO25°℃85℃125℃TESTPARAMETERSYMBOLCONDITIONSVcc(M)MINTYPMAXMINMAXMINMAXUNITS2-.185230CL = 50pF-280nsAny Data Input toY.tpLH, tPHL4.5·374656.ns--15CL=15pF5-.：-ns--6CL= 50pF313948ns---1852---230280nsAny Select to Y-tpLH, tPHLCL = 50pF4.5375646ns----CL=15pF5-15?ns.--6、31CL = 50pF3948ns---2.205255310nsAny Select to Y-CL= 50pF-tPLH, tPHL-624.54151.ns.--CL =15pF517·ns----6·35CL= 50pF4353ns--.2140Enable toY--175210nsCL=50pF-tpLH, tPHL-4.5284235ns----CL=15pF511-ns----6.CL= 50pF243036ns---2..145180220nsEnable to YCL = 50pF-tpLH,tPHL-4.5293644ns---CL=15pF5-12--ns---6.25CL= 50pF3138ns--、Output Transition Time2.7595110ns-CL= 50pF--tTLH, tTHL(Figure 1)4.5151922！ns.--136、.1619ns-----101010pFInputCapacitanceCIN.-559PowerDissipationCapacitancepFCPD、:-----(Notes 4, 5)HCTTYPESPropagation Delay (Figure 2)tPLH- tPHL4.5-·384857CL= 50pF-Any Data Input to Y-ns5-16CL=15pF--ns--4.5-3654nsAny Data Input toYtPLH, tPHLCL=50pF-45-CL=15pF515---ns-.-624.5:4151Any Select to YCL = 50pF-.nstPLH, tPHLCL=15pF517ns----4.5--43Any Select to YCL= 50pF5465nstPLH, tPHL--CL=15pF518-ns-.-293644EnabletoY4.5----nstPLH. tPHLCL= 50pF512CL=15pFns-----5

5 Any Data Input to Y tPLH, tPHL CL = 50pF 2 - - 185 - 230 - 280 ns 4.5 - - 37 - 46 - 56 ns CL =15pF 5 - 15 - - - - - ns CL = 50pF 6 - - 31 - 39 - 48 ns Any Select to Y tPLH, tPHL CL = 50pF 2 - - 185 - 230 - 280 ns 4.5 - - 37 - 46 - 56 ns CL =15pF 5 - 15 - - - - - ns CL = 50pF 6 - - 31 - 39 - 48 ns Any Select to Y tPLH, tPHL CL = 50pF 2 - - 205 - 255 - 310 ns 4.5 - - 41 - 51 - 62 ns CL =15pF 5 - 17 - - - - - ns CL = 50pF 6 - - 35 - 43 - 53 ns Enable to Y tPLH, tPHL CL = 50pF 2 - - 140 - 175 - 210 ns 4.5 - - 28 - 35 - 42 ns CL =15pF 5 - 11 - - - - - ns CL = 50pF 6 - - 24 - 30 - 36 ns Enable to Y tPLH, tPHL CL = 50pF 2 - - 145 - 180 - 220 ns 4.5 - - 29 - 36 - 44 ns CL =15pF 5 - 12 - - - - - ns CL = 50pF 6 - - 25 - 31 - 38 ns Output Transition Time (Figure 1) tTLH, tTHL CL = 50pF 2 - - 75 - 95 - 110 ns 4.5 - - 15 - 19 - 22 ns 6 - - 13 - 16 - 19 ns Input Capacitance CIN - - - - 10 - 10 - 10 pF Power Dissipation Capacitance (Notes 4, 5) CPD - 5 - 59 - - - - - pF HCT TYPES Propagation Delay (Figure 2) tPLH, tPHL Any Data Input to Y CL = 50pF 4.5 - - 38 - 48 - 57 ns CL =15pF 5 - 16 - - - - ns Any Data Input to Y tPLH, tPHL CL = 50pF 4.5 - - 36 - 45 - 54 ns CL =15pF 5 - 15 - - - - - ns Any Select to Y tPLH, tPHL CL = 50pF 4.5 - 41 - 51 - 62 ns CL =15pF 5 - 17 - - - - - ns Any Select to Y tPLH, tPHL CL = 50pF 4.5 - - 43 - 54 - 65 ns CL =15pF 5 - 18 - - - - - ns Enable to Y tPLH, tPHL CL = 50pF 4.5 - - 29 - 36 - 44 ns CL =15pF 5 - 12 - - - - - ns Switching Specifications Input tr, tf = 6ns (Continued) PARAMETER SYMBOL TEST CONDITIONS VCC (V) 25oC -40oC TO 85oC -55oC TO 125oC MIN TYP MAX MIN MAX MIN MAX UNITS CD74HC151, CD74HCT151

CD74HC151.CD74HCT151SwitchingSpecificationsInputt,tf=6ns(Continued)-40°CTO-55°CTO25℃85℃125℃TESTSYMBOLVcc(M)MINTYPMINMINPARAMETERCONDITIONSMAXMAXMAXUNITS4.5364654EnabletoYCL=50pFCL = 50pF:ns---515·-CL=15pFCL=15pFns.--154.5--1922Output Transition TimetTLH, THLCL = 50pF--nsCIN--101010pFInput Capacitance·-PowerDissipation CapacitanceCpD558pF-----(Notes 4, 5)NOTES:4.Cppisusedtodeteminethedynamicpowerconsumptionpergate.5.Pp =Vccfi(CpD +C)where fi= input frequency,CL=output load capacitance,Vcc =supply voltageTestCircuitandWaveformt, = 6ns-ty=6nsINPUTLEVELENABLE - 90%VsSELECT10%-InGNDtTHLtTLH+90%YOUTPUT.-Vs10%1tPLH——tPLHtPHLtPHL--VsYOUTPUTF tTHLtTLHFIGURE1.6

6 Enable to Y CL = 50pF CL = 50pF 4.5 - - 36 - 46 - 54 ns CL =15pF CL =15pF 5 15 - - - - - - ns Output Transition Time tTLH, tTHL CL = 50pF 4.5 - - 15 - 19 - 22 ns Input Capacitance CIN - - - - 10 - 10 - 10 pF Power Dissipation Capacitance (Notes 4, 5) CPD - 5 58 - - - - - pF NOTES: 4. CPD is used to determine the dynamic power consumption, per gate. 5. PD = VCC2 fi (CPD + CL) where fi = input frequency, CL = output load capacitance, VCC = supply voltage. Switching Specifications Input tr, tf = 6ns (Continued) PARAMETER SYMBOL TEST CONDITIONS VCC (V) 25oC -40oC TO 85oC -55oC TO 125oC MIN TYP MAX MIN MAX MIN MAX UNITS Test Circuit and Waveform FIGURE 1. ENABLE SELECT In Y OUTPUT tPHL tPLH Y OUTPUT INPUT LEVEL GND VS tTHL tTLH tPHL tPLH 10% 90% VS tf tr = 6ns = 6ns tTHL tTLH 10% 90% VS CD74HC151, CD74HCT151

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