电子科技大学：《VHDL语言与数字集成电路设计》数字逻辑3-1

Chapter 3 Digital circuit Basic structure Electrical behavior

Basic Structure Electrical behavior Chapter 3 Digital circuit

Basic CMos gates Any node must get 1/0 from Ⅴcc/ Gnd by switches Switch is made by mos device

Basic CMOS gates Any node must get 1/0 from Vcc/Gnd by switches Switch is made by MOS device

MOS device D G 0 S D G1 S n+ p B p p B p Switch is controlled by g through electric field On: rp-s is low; Off: Rp-s is high;

MOS device Switch is controlled by G through electric field; On: RD-S is low; Off: RD-S is high;

Two types of mos device PMOS: when g is 0, Switch on when g is i switch off: G-忙PMOs NMOS: when g is 1. switch on when g is 0. Switch off G-C NMOS

PMOS: when G is 0, Switch on; when G is 1, Switch off; NMOS: when G is 1, Switch on; when G is 0, Switch off; Two types of MOS device

CMos inverter VDD VDD XF F=X X-DO-F 10 GRD GRD F: get 1 from PMOS, get 0 from NMOs; When x=1. nmos is on: When x=0. pmos is on Why must be complementary

CMOS inverter F: get 1 from PMOS, get 0 from NMOS; When X=1, NMOS is on; When X=0, PMOS is on; Why must be complementary ?

NANd gate/NOR gate B Q1 43 NAND: NMOS serial PMos parallel: NOR: NMOS parallel, PMOS serial;

NAND gate / NOR gate NAND: NMOS serial , PMOS parallel; NOR: NMOS parallel, PMOS serial;

NAND gate/NOR gate Each input control a pmos and an nmos; AND -- series OR pa arale Logic is represented by NMos connections, PMOS is a duality connection

NAND gate / NOR gate Each input control a PMOS and an NMOS; AND -- series OR -- parallel Logic is represented by NMOS connections , PMOS is a duality connection

AOI OAI Q3 D

AOI / OAI

Summery for basic cmos CC P net b b input output N net a a b b a+b Gnd NAND NOR a b+c Each input is connected both nmos and Pmos; The logic is expressed in n net, Pnet is its duality; The output is a negative logic

Summery for basic CMOS Each input is connected both NMOS and PMOS; The logic is expressed in N net , P net is its duality; The output is a negative logic !

More examples F〓abbc+ac F=b(atc)+ac a a4[b4 a 4L C4L b4[c4 ad 2F b aE c Fa bc H aE F F b a七cc

More examples