香港理工大学：INSTRUCTION SETS 指令

2.INSTRUCTION SETS I Rocky K.C.Chang Version 0.3,14 September 2017

Rocky K. C. Chang Version 0.3, 14 September 2017

GOAIS OF THIS LECTURE Know how to write MIPS assembly language for Arithmetic operations logical operations Data transfer between registers and memory Control flow(branching and loops) Understand two different types of byte order

▪Know how to write MIPS assembly language for ▪ Arithmetic operations ▪ Logical operations ▪ Data transfer between registers and memory ▪ Control flow (branching and loops) ▪Understand two different types of byte order 2

LEVELS OF REPRESENTATION/ INTERPRETATION High Level language temp=vk; Program(e.g, c) k]=v[k+1] k+]=temp; Compiler Assembly Language lw Sto. 0(62) Anything can be represented lw: Stl, 4($2 Program(e. g, MIPS) sw $tl, 0($2 sa sW$t0,4(92) . e. data or instruction Assembler 00001001110001101010111101011000 Machine Language 10101111010110000000100111000110 Program(MIPS 11000110101011110101100000001001 01011000000010011100011010101111 Machine Interpretation Hardware Architecture Description ALU e.g., bloc diagrams Architecture Implementation Logic Circuit Description Circuit Schematic Diagrams

3 lw $t0, 0($2) lw $t1, 4($2) sw $t1, 0($2) sw $t0, 4($2) High Level Language Program (e.g., C) Assembly Language Program (e.g., MIPS) Machine Language Program (MIPS) Hardware Architecture Description (e.g., block diagrams) Compiler Assembler Machine Interpretation temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; 0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 Architecture Implementation Anything can be represented as a number, i.e., data or instructions 3 Logic Circuit Description (Circuit Schematic Diagrams)

ASSEMBLY LANGUAGS Basic job of a CPU: execute lots of instructions Instructions are the primitive operations that the cpu may execute Different CPUs implement different sets of instructions. The set of instructions a particular CPu implements is an Instruction Set Architecture(ISA) Examples: ARM, Intel x86, MIPS, RISC-V, IBM/Motorola PowerPC(old Mac) Intel IA64

▪Basic job of a CPU: execute lots of instructions. ▪ Instructions are the primitive operations that the CPU may execute. ▪Different CPUs implement different sets of instructions. The set of instructions a particular CPU implements is an Instruction Set Architecture (ISA). ▪ Examples: ARM, Intel x86, MIPS, RISC-V, IBM/Motorola PowerPC (old Mac), Intel IA64, ... 4

INSTRUCTION SET ARCHITECTURES Early trend was to add more and more instructions to new CPus to do elaborate operations VAX architecture had an instruction to multiply polynomials! RISC philosophy (Cocke IBM, Patterson, Hennessy, 1980s) Reduced Instruction Set Computing Keep the instruction set small and simple, makes it easier to build fast hardware Let software do complicated operations by composing simpler ones

▪Early trend was to add more and more instructions to new CPUs to do elaborate operations ▪ VAX architecture had an instruction to multiply polynomials! ▪RISC philosophy (Cocke IBM, Patterson, Hennessy, 1980s) – Reduced Instruction Set Computing ▪ Keep the instruction set small and simple, makes it easier to build fast hardware. ▪ Let software do complicated operations by composing simpler ones. 5

MIPS ARCHITECTURE MIPS-semiconductor company that built one of the first commercial RISC architectures We will study the mips architecture in some detail in this class Why mips instead of Intel x86? MIPS is simple, elegant. Dont want to get bogged down in gritty details MPS widely used in embedded apps, x86 lttle used in embedded, and more embedded computers than PCs

▪MIPS – semiconductor company that built one of the first commercial RISC architectures ▪ We will study the MIPS architecture in some detail in this class. ▪ Why MIPS instead of Intel x86? ▪ MIPS is simple, elegant. Don’t want to get bogged down in gritty details. ▪ MIPS widely used in embedded apps, x86 little used in embedded, and more embedded computers than PCs 6

MIPS32 (32-BIT INSTRUCTIONS) emory Program Bytes One mips instruction 32 bits Data

7 7 Memory Bytes Program Data One MIPS Instruction = 32 bits

HOW PROGRAM IS EXECUTED? Memory Processor struction Control n bits rogram Datapath Program Counter struction Bytes- Address Registers Arithmetic Logic Unit Data (ALU) The program counter (internal register inside processor) holds address of next instruction to be executed

8 Processor Control Datapath Program Counter Registers Arithmetic & Logic Unit (ALU) Memory Instruction Bytes Address Read Instructio n Bits Program Data The program counter (internal register inside processor) holds address of next instruction to be executed

ASSEMBIY VARIABIES REGISTERS Unlike HlL like C or java, assembly cannot use variables Why not? Keep hardware simple Assembly operands are registers Limited number of special locations built directly into the hardware Operations can only be performed on these registers. Benefit: Since registers are directly in hardware, they are very fast (faster than I ns-light travels 30cm in l ns!!!)

▪ Unlike HLL like C or Java, assembly cannot use variables ▪ Why not? Keep hardware simple ▪ Assembly operands are registers. ▪ Limited number of special locations built directly into the hardware ▪ Operations can only be performed on these registers! ▪Benefit: Since registers are directly in hardware, they are very fast (faster than 1 ns - light travels 30cm in 1 ns!!! ) 9

NUMBER OF MIPS REGISTERS Drawback: Since registers are in hardware there are a predetermined number of them Solution: MiPS code must be very carefully put together to eficiently use registers 32 registers in MPs Why 32? Smaller is faster, but too small is bad. Goldilocks problem Each MPS register is 32 bits wide Groups of 32 bits called a word in MPS

▪Drawback: Since registers are in hardware, there are a predetermined number of them. ▪ Solution: MIPS code must be very carefully put together to efficiently use registers. ▪32 registers in MIPS ▪ Why 32? Smaller is faster, but too small is bad. Goldilocks problem. ▪Each MIPS register is 32 bits wide ▪ Groups of 32 bits called a word in MIPS 10