《嵌入式应用开发》课程教学资源(文献资料)AL422 Data Sheets

AVERLOGICAL422 Data Sheets(Revision V1.1)
AL422 Data Sheets (Revision V1.1)

AVERLOGICAL422Amendments (Since April 2,1999)05-13-99DC/AC characteristics (including current consumption)updated07-02-99Pinout diagram (5.0)and DC external load (7.4)modified08-03-99Description about TST pin added in sections 6.0& 8.1.09-02-998.3.2rewritten10-26-99Capacitance provided in the AC characteristics section12-15-99RemoveTSTpinrestriction01-18-011.Revised section“8.3.2Read Enable during Reset Cycles"to“8.3.2The ProperManipulationofFIFOAccess".2.Add section"8.3.3SingleField Write withMultipleRead Operation”3.Add section "8.3.4 One Field Delay Line (The Old Data Read)"2AL422BJanuary23,2001
AL422 AL422B January 23, 2001 2 Amendments (Since April 2, 1999) 05-13-99 DC/AC characteristics (including current consumption) updated. 07-02-99 Pinout diagram (5.0) and DC external load (7.4) modified. 08-03-99 Description about TST pin added in sections 6.0 & 8.1. 09-02-99 8.3.2 rewritten. 10-26-99 Capacitance provided in the AC characteristics section. 12-15-99 Remove TST pin restriction. 01-18-01 1. Revised section “8.3.2 Read Enable during Reset Cycles” to “8.3.2 The Proper Manipulation of FIFO Access”. 2. Add section “8.3.3 Single Field Write with Multiple Read Operation” 3. Add section “8.3.4 One Field Delay Line (The Old Data Read)

AVERLOGICAL422AL422 3M-Bits FIFOField MemoryContents:41.0Description42.0Features43.0Applications44.0 Ordering Information55.0 Pinout Diagram56.0 Pin Description67.0ElectricalCharacteristics67.1AbsoluteMaximumRatings67.2RecommendedOperatingConditions67.3DCCharacteristics77.4AC Characteristics97.5Timing Diagrams138.0 Functional Description148.1 Memory Operation158.25Vand3.3Vapplications168.3 Application Notes168.3.1 Irregular Read/Write178.3.2The Proper Manipulation of FIFOAccess178.3.3SingleField Write withMultipleRead Operation178.3.4OneFieldDelayLine(TheOldDataRead)199.0 Mechanical Drawing3AL422BJanuary 23,2001
AL422 AL422B January 23, 2001 3 AL422 3M-Bits FIFO Field Memory Contents: 1.0 Description _ 4 2.0 Features_ 4 3.0 Applications_ 4 4.0 Ordering Information_ 4 5.0 Pinout Diagram _ 5 6.0 Pin Description _ 5 7.0 Electrical Characteristics _ 6 7.1 Absolute Maximum Ratings _ 6 7.2 Recommended Operating Conditions _ 6 7.3 DC Characteristics _ 6 7.4 AC Characteristics _ 7 7.5 Timing Diagrams_ 9 8.0 Functional Description_ 13 8.1 Memory Operation _ 14 8.2 5V and 3.3V applications _ 15 8.3 Application Notes _ 16 8.3.1 Irregular Read/Write _ 16 8.3.2 The Proper Manipulation of FIFO Access _ 17 8.3.3 Single Field Write with Multiple Read Operation_ 17 8.3.4 One Field Delay Line (The Old Data Read) _ 17 9.0 Mechanical Drawing _ 19

AVERLOGICAL4221.0DescriptionThe AL422 consists of 3M-bits of DRAM, and is configured as 393,216 words x 8 bit FIFO (first infirst out).The interface is very user-friendly since all complicated DRAM operations are alreadymanaged by the internal DRAM controller.Currentsourcesofsimilarmemory(fieldmemory)inthemarketprovidelimitedmemorysizewhichis only enough for holding one TV field, but not enough to hold a whole PC video frame whichnormallycontains640x480or720x480bytes.TheAverLogicAL422provides50%morememoryto support high resolutionfor digital PC graphics orvideo applications.The50% increase in speedalso expands the range of applications.2.0 Features3.0Applications384K (393,216)x8bitsFIFOorganizationMultimedia systemsSupport VGA, CCIR, NTSC,PAL andVideo capture systemsHDTV resolutionsVideo editing systemsIndependentread/writeoperations(differentScan rate convertersI/O data rates acceptable)TV's picture in picture featureHigh speed asynchronous serial accessTimebasecorrection (TBC).Read/write cycle time:20ns-FramesynchronizerAccess time: 15nsDigital video cameraOutput enable control (data skipping)BufferforcommunicationssystemsSelf refresh5Vor3.3Vpower supplyStandard 28-pin SOP package4.0OrderingInformationPart numberPackagePower SupplyStatusAL422B28-pin plastic SOP+5/+3.3 voltShippingAL422V528-pin plastic SOP+5 voltReplaced by AL422BAL422V3+3.3 volt28-pin plastic SOPReplaced by AL422B4AL422BJanuary23,2001
AL422 AL422B January 23, 2001 4 1.0 Description The AL422 consists of 3M-bits of DRAM, and is configured as 393,216 words x 8 bit FIFO (first in first out). The interface is very user-friendly since all complicated DRAM operations are already managed by the internal DRAM controller. Current sources of similar memory (field memory) in the market provide limited memory size which is only enough for holding one TV field, but not enough to hold a whole PC video frame which normally contains 640x480 or 720x480 bytes. The AverLogic AL422 provides 50% more memory to support high resolution for digital PC graphics or video applications. The 50% increase in speed also expands the range of applications. 2.0 Features · 384K (393,216) x 8 bits FIFO organization · Support VGA, CCIR, NTSC, PAL and HDTV resolutions · Independent read/write operations (different I/O data rates acceptable) · High speed asynchronous serial access · Read/write cycle time: 20ns · Access time: 15ns · Output enable control (data skipping) · Self refresh · 5V or 3.3V power supply · Standard 28-pin SOP package 3.0 Applications · Multimedia systems · Video capture systems · Video editing systems · Scan rate converters · TV’s picture in picture feature · Time base correction (TBC) · Frame synchronizer · Digital video camera · Buffer for communications systems 4.0 Ordering Information Part number Package Power Supply Status AL422B 28-pin plastic SOP +5/+3.3 volt Shipping AL422V5 28-pin plastic SOP +5 volt Replaced by AL422B AL422V3 28-pin plastic SOP +3.3 volt Replaced by AL422B

AVERLOGICAL4225.0PinoutDiagramDO1DO2IREDO7DOODO3GNDIOE/RRSTRCKDECDO5DO6DO428272625242221118161523201917AVERLOGICAL422BxxxxxLot NumberXXXXDate CodeDIODI1DI2DI3WE GNDTSTMRSTWCKVDDDI4DI5DI6DI7AL422-04 422B pinout diagram6.0PinDescriptionPin #Pin nameI/O typeFunctionDI0~DI71~4, 11~14inputData input9InputWCKWrite clock5/WEInput (active low)Write enable8/WRSTInput (active low)Write resetDO0~DO715~18,25~28Output (tristate)Data output20RCKInputRead clock24/REInput (active low)Read enable21/RRSTInput (active low)Read reset22/OEOutput enableInput (active low)7TSTInputTest pin (pulled-down)*10VDD5Vor3.3V19DEC/VDDDecoupling cap inputGND6, 23Ground5AL422BJanuary23,2001
AL422 AL422B January 23, 2001 5 5.0 Pinout Diagram 6.0 Pin Description Pin name Pin # I/O type Function DI0~DI7 1~4, 11~14 input Data input WCK 9 Input Write clock /WE 5 Input (active low) Write enable /WRST 8 Input (active low) Write reset DO0~DO7 15~18, 25~28 Output (tristate) Data output RCK 20 Input Read clock /RE 24 Input (active low) Read enable /RRST 21 Input (active low) Read reset /OE 22 Input (active low) Output enable TST 7 Input Test pin (pulled-down)* VDD 10 5V or 3.3V DEC/VDD 19 Decoupling cap input GND 6, 23 Ground 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 DI0 DI1 DI2 DI3 /WE GND TST /WRST WCK VDD DI4 DI5 DI6 DI7 DO0 DO1 DO2 DO3 /RE GND /OE /RRST RCK DEC DO4 DO5 DO6 DO7 AL422-04 422B pinout diagram AVERLOGIC AL422B XXXXX XXXX Lot Number Date Code

AVERLOGICAL4227.0ElectricalCharacteristics7.1AbsoluteMaximumRatingsRatingsParameterUnit3.3Vapplication5VapplicationVVDSupply Voltage-1.0 ~ +4.5-1.0~ +7.0VpVPin Voltage-1.0~+5.5-1.0~VDD+0.5IomAOutput Current-20 ~+20-20~ +20TAMB℃Ambient Op.Temperature0~ +700~ +70Tsg℃-55 ~ +125-55~+125Storage temperature7.2RecommendedOperatingConditions3.3V application5VapplicationUnitParameterMinMaxMinMaxVDD+3.0+4.5v+3.6+5.25SupplyVoltageViv+2.0+5.5+3.0VpD +0.5High Level Input VoltageVLV-1.0Low Level Input Voltage+0.8-1.0+0.87.3DCCharacteristics(VpD=5Vor3.3V,Vss=0V.TAMB=0to70°C)3.3Vapplication5VapplicationUnitParameterMinTypMaxMinTypMax3350IoDmAOperatingCurrent@20MHz---IoD4566mAOperatingCurrent@30MHz-.--IoD5782mAOperating Current @40MHz-.-IoD6897-mAOperatingCurrent@50MHz.、-Iops712mAStandbyCurrent..-VoHvVD+3.0VoDHi-level Output Voltage0.7VDD--vVoL+0.4+0.4Lo-level Output Voltage---.lu-10+10-10-+10μAInput Leakage Current-ILo-10+10-10+10Output Leakage Current--μA6AL422BJanuary23,2001
AL422 AL422B January 23, 2001 6 7.0 Electrical Characteristics 7.1 Absolute Maximum Ratings Ratings Parameter 3.3V application 5V application Unit VDD Supply Voltage -1.0 ~ +4.5 -1.0 ~ +7.0 V VP Pin Voltage -1.0 ~ +5.5 -1.0 ~ VDD +0.5 V IO Output Current -20 ~ +20 -20 ~ +20 mA TAMB Ambient Op. Temperature 0 ~ +70 0 ~ +70 °C Tstg Storage temperature -55 ~ +125 -55 ~ +125 °C 7.2 Recommended Operating Conditions 3.3V application 5V application Parameter Min Max Min Max Unit VDD Supply Voltage +3.0 +3.6 +4.5 +5.25 V VIH High Level Input Voltage +2.0 +5.5 +3.0 VDD +0.5 V VIL Low Level Input Voltage -1.0 +0.8 -1.0 +0.8 V 7.3 DC Characteristics (VDD =5V or 3.3V, Vss=0V. TAMB = 0 to 70°C) 3.3V application 5V application Parameter Min Typ Max Min Typ Max Unit IDD Operating Current @20MHz - 33 - - 50 - mA IDD Operating Current @30MHz - 45 - - 66 - mA IDD Operating Current @40MHz - 57 - - 82 - mA IDD Operating Current @50MHz - 68 - - 97 - mA IDDS Standby Current - 7 - - 12 - mA VOH Hi-level Output Voltage 0.7VDD - VDD +3.0 - VDD V VOL Lo-level Output Voltage - - +0.4 - - +0.4 V ILI Input Leakage Current -10 - +10 -10 - +10 mA ILO Output Leakage Current -10 - +10 -10 - +10 mA

AVERLOGICAL4227.4AC Characteristics(VpD =5V or 3.3V, Vss=0V, TAMB =0 to 70°C)3.3V application5VapplicationParameterUnitMinMaxMinMaxTwc20201000WCK Cycle Time1000ns77TweH.-WCK High Pulse WidthnsTwn.77-WCK Low Pulse Width-nsTrc2020RCK Cycle Time10001000ns77TrPH!RCK High Pulse Width-ns77TrP.-!RCKLowPulseWidthnsTac1515-Access TimensTo4.4!OutputHoldTimensTz341515Output High-Z Setup TimensTuz341515nsOutputLow-Z SetupTimeTwrs56.!/WRST Setup TimensTweH23--ns/WRSTHoldTimeTRRS5-6!/RRSTSetupTimensTRH2-3!/RRSTHoldTimens56Tos--nsInput Data Setup Time23Toi--nsInput Data Hold Time56Twes.-/WESetupTimens23TwEH/WE Hold Time--nsTww1010/WE Pulse Width-ns-Tres56--ns/RESetupTime3TREH2·/RE Hold Time-nsTrpw1010-/RE Pulse Width·ns56Toes-/OE Setup Time-ns2Tont-3-/OE Hold TimensToew10-10-ns/OEPulseWidthTir220320Transition Timens·77C-pFInput Capacitance7Co-7Output Capacitance-pF7AL422BJanuary23,2001
AL422 AL422B January 23, 2001 7 7.4 AC Characteristics (VDD =5V or 3.3V, Vss=0V, TAMB = 0 to 70°C) 3.3V application 5V application Parameter Min Max Min Max Unit TWC WCK Cycle Time 20 1000 20 1000 ns TWPH WCK High Pulse Width 7 - 7 - ns TWPL WCK Low Pulse Width 7 - 7 - ns TRC RCK Cycle Time 20 1000 20 1000 ns TRPH RCK High Pulse Width 7 - 7 - ns TRPL RCK Low Pulse Width 7 - 7 - ns TAC Access Time - 15 - 15 ns TOH Output Hold Time 4 - 4 - ns THZ Output High-Z Setup Time 3 15 4 15 ns TLZ Output Low-Z Setup Time 3 15 4 15 ns TWRS /WRST Setup Time 5 - 6 - ns TWRH /WRST Hold Time 2 - 3 - ns TRRS /RRST Setup Time 5 - 6 - ns TRRH /RRST Hold Time 2 - 3 - ns TDS Input Data Setup Time 5 - 6 - ns TDH Input Data Hold Time 2 - 3 - ns TWES /WE Setup Time 5 - 6 - ns TWEH /WE Hold Time 2 - 3 - ns TWPW /WE Pulse Width 10 - 10 - ns TRES /RE Setup Time 5 - 6 - ns TREH /RE Hold Time 2 - 3 - ns TRPW /RE Pulse Width 10 - 10 - ns TOES /OE Setup Time 5 - 6 - ns TOEH /OE Hold Time 2 - 3 - ns TOPW /OE Pulse Width 10 - 10 - ns TTR Transition Time 2 20 3 20 ns CI Input Capacitance - 7 - 7 pF CO Output Capacitance - 7 - 7 pF

AVERLOGICAL422Input voltage levels are defined as VIH=3.0V and VIL=0.4V.The read address needs to be at least 128 cycles after the write address.DOexternal load:Y0D2R>1.8kD00~D07>X>Ric>1.1k30pFAL422-17AL422extemal load8AL422BJanuary23,2001
AL422 AL422B January 23, 2001 8 · Input voltage levels are defined as VIH=3.0V and VIL=0.4V. · The read address needs to be at least 128 cycles after the write address. DO external load:

AVERLOGICAL4227.5 Timing DiagramsResetcvcle(s)WCKWRSTDI7~0n1XXXnXXXXXXX°XXXXXWE = "L"AL422-05WriteCycleTiming (WriteReset)Resetcycle rCycle0cvclecycle (s)TRERCK/RRSTDO7~0XXX,XXX。XXX。XXX1XXX/RE = IOE ="L"AL422-07ReadCycleTiming(ReadReset)9AL422BJanuary232001
AL422 AL422B January 23, 2001 9 7.5 Timing Diagrams cycle n Reset cycle (s) cycle 0 cycle 1 WCK /WRST DI7~0 AL422-05 Write Cycle Timing (Write Reset) TTR TWRS TWRH n-1 n 0 1 TDS TDH /WE = "L" RCK /RRST DO7~0 n-1 n TOH AL422-07 Read Cycle Timing (Read Reset) TRPH TRPL 0 1 cycle n Reset cycle (s) cycle 0 cycle 1 TRRS TRRH TAC 0 /RE = /OE = "L

AVERLOGICAL422cycle n+2cyclenvclentDisable cycle (s)RCKTRPJRE/RETRPWTOHXXX n+2DO7~0XnXXXn+1IOE ="L"AL422-08ReadCycleTiming(ReadEnable)cyclen+3vclentevclen+2cyclen+4cvclelIR:RCKTRTROTOESJToEOEToPTHZHi-7DO7~0n-1XXXnn+RE="L"AL422-09 ReadCycleTiming(OutputEnable)10AL422BJanuary23,2001
AL422 AL422B January 23, 2001 10 cycle n cycle n+1 cycle n+3 RCK /OE DO7~0 n-1 n AL422-09 Read Cycle Timing (Output Enable) TRPH TRPL TRC TOES TOEH n+1 TOPW TOH TAC cycle n+2 Hi-Z cycle n+4 n+4 THZ TLZ /RE = "L" cycle n cycle n+1 Disable cycle (s) RCK /RE DO7~0 n-1 n AL422-08 Read Cycle Timing (Read Enable) TRPH TRPL TRC TRES TREH n+1 TRPW TOH TAC n+2 cycle n+2 /OE = "L
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