《数字电》英文版 chapter4-3 Flip-flops

Flip-flops Chapter4 Simple counter

Flip-flops Chapter4 Simple counter

a Counting is a fundamental function of digital circuits aa digital counter consists of a collection of flip-flops that change states(set or reset) in a prescribed sequence

◼ Counting is a fundamental function of digital circuits. ◼ A digital counter consists of a collection of flip-flops that change states (set or reset) in a prescribed sequence

Divide by 2, 4 and 8 Counters a Asynchronous counter The output of one flip-flop provides the clock for the next flip -flops a When all of the flip-flop outputs are available, these are called modulo-n counters where n represent the terminal counter

◼ Asynchronous counter ◼ The output of one flip-flop provides the clock for the next flip-flops. ◼ When all of the flip-flop outputs are available, these are called modulo-n counters where n represent the terminal counter. •Divide by 2,4 and 8 Counters

Cc Q1 1Q2 CLK JcK Q1 CK Q2 CLK Q101901101 Q20 0 0 0

KJ Q1’ Q1 C CLK KJ Q2’ Q2 C 1 1 VCC CLK Q1 Q2 00 10 01 11 00 10

Johnson Counter(synchronous) Q2 Q3D Q4 Q4 4>c Q1 CDC @2roc Q3 C CLK The output of one flip-flop directly connects to the input of another

•Johnson Counter (synchronous) ◼ The output of one flip-flop directly connects to the input of another. D Q1’ Q1 C D Q2’ Q2 C D Q3’ Q3 C D Q4’ Q4 C CLK

Q1 D Q2 Q3 Q4 Q4 CC @1 pc Q2 Q3 Cc CLK CLK Q1 Q2 Q3 Q4 makK3a1220:132+1

1 1 0 0 D Q1’ Q1 C D Q2’ Q2 C D Q3’ Q3 C D Q4’ Q4 C CLK CLK Q1 Q3 Q4 Q2 t 1 2 3 4 5 6 7 8 9 t’ ◼ Time t, CLK=1, Q1=1, Q2=1, Q3=0, Q4=0 ◼ Time t’, CLK=0, Q1=Q4’t=1, Q2=Q1t=1, Q3=Q2t=1, Q4=Q3t=0 1 1 1 0

Johnson Counter(synchronous) a The Johnson counter can produce a series of outputs from each flip-flop that is offset by a clock pulse from the preceding flip-flop output a The Johnson counter can be used to produce time delay the output of each flip-flop is delayed by one clock pulse from the previous output

•Johnson Counter (synchronous) ◼ The Johnson counter can produce a series of outputs from each flip-flop that is offset by a clock pulse from the preceding flip-flop output. ◼ The Johnson counter can be used to produce time delay; the output of each flip-flop is delayed by one clock pulse from the previous output

Ring Counter(synchronous) The output of one flip-flop directly connects to the input of another The ability to load the flip-flops to a particular state permits a repeatable output pattern a The counter is initialized to the appropriate data pattern, using the flip-flops'asynchronous inputs

•Ring Counter (synchronous) ◼ The output of one flip-flop directly connects to the input of another. ◼ The ability to load the flip-flops to a particular state permits a repeatable output pattern. ◼ The counter is initialized to the appropriate data pattern, using the flip-flops’ asynchronous inputs

Ring Counter(synchronous) a Each flip-flop has separate preset and clear inputs Feeding back the most significant output to the least significant input, data are shifted from one flip-flop to the next on each negative/positive edge of the clock pulse. a The preloaded pattern repeats every clock pulse. n is the length of data pattern

•Ring Counter (synchronous) ◼ Each flip-flop has separate preset and clear inputs . ◼ Feeding back the most significant output to the least significant input, Data are shifted from one flip-flop to the next on each negative/positive edge of the clock pulse. ◼ The preloaded pattern repeats every n clock pulse. n is the length of data pattern

Q2 Q3 Q4 Q Q2 bQ3 Q4 C 少C C CLK CLK Q1 Q2 0 Q30|1110}0 Q4 010 10 Time t,CLK=1,Q4=0,Q3=0,Q2=1,Q1=1; Time t,CLK=0,Q4=Q3t=0,Q3=Q2=1,Q2=Q1=1,Q1=Q4t=0

D Q1’ Q1 C D Q2’ Q2 C D Q3’ Q3 C D Q4’ Q4 C CLK CLK Q1 Q3 Q4 Q2 t t’ Time t, CLK=1, Q4=0, Q3=0, Q2=1, Q1=1; Time t’, CLK=0, Q4=Q3t=0, Q3=Q2t=1, Q2=Q1t=1, Q1=Q4t=0 0 1 1 0 1 1 0 0 0 0 1 1 1 0 0 1 1 1 0 0 1 2 3 4