中国高校课件下载中心 》 教学资源 》 大学文库

《计算机英语》Analyzing Designs Using Model Technology's Mode Sim

文档信息
资源类别:文库
文档格式:PPT
文档页数:73
文件大小:869.5KB
团购合买:点击进入团购
内容简介
Typical PLD Flow Design Specification Design Modification Design Entry RTL Simulation Design Synthesis Place Route Gate Level simulation Timing Analysis In-System Verification
刷新页面文档预览

Analyzing Designs Using Model Technology's Modelsim

1 Analyzing Designs Using Model Technology’s ModelSim

Typical PLD Design Flow

2 Typical PLD Design Flow

Typical PLD Flow Design Specification Design Modification Design Entry RTL SImulation Design Synthesis Place route Gate Level Simulation Timing Analysis In-System Verification System Production

3 System Production Design Specification Typical PLD Flow Design Entry RTL Simulation Design Synthesis Gate Level Simulation Place & Route Timing Analysis In-System Verification Design Modification

Typical PLD Design Flow ■ Design Entry Behavioral or structural description of design RTL Simulation(ModelSim) Functional simulation Verify logic model(no timing delays used) May require design edits Synthesis Translate design into target technology primitives Optimization Meet required area and performance constraints ■Pace& Route Map the design to specific locations inside target technology Specify which routing resources should be used

4 Typical PLD Design Flow ◼ Design Entry – Behavioral or structural description of design ◼ RTL Simulation (ModelSim) – Functional simulation – Verify logic model (no timing delays used) – May require design edits ◼ Synthesis – Translate design into target technology primitives – Optimization • Meet required area and performance constraints ◼ Place & Route – Map the design to specific locations inside target technology – Specify which routing resources should be used

Typical PLD Design Flow a Gate Level Simulation(ModelSim) Timing simulation Verify design will work in target technology once programmed/configured May require design edits ■ Timing analysis a Verify performance specifications were met May require design edits ■ Board design Simulate board design Program and test device on board

5 Typical PLD Design Flow ◼ Gate Level Simulation (ModelSim) – Timing simulation – Verify design will work in target technology once programmed/configured – May require design edits ◼ Timing Analysis ◼ Verify performance specifications were met – May require design edits ◼ Board Design – Simulate board design – Program and test device on board

Modelsim overview 700LF

6 ModelSim Overview

Modelsim simulation tool a Developed by Model Technology a One of Industry's Most Popular Simulators Simulates both verilog VHDL OEM Version allows for Verilog simulation 700L OR VHD Simulation lode lechnology

ModelSim Simulation Tool ◼ Developed by Model Technology ◼ One of Industry’s Most Popular Simulators ◼ Simulates both Verilog & VHDL – OEM Version allows for Verilog simulation OR VHDL simulation

Modelsim products ■ Model sim∧ HDL or ModelSim/Verilog VLOG Checklist OEM ■Mode|Sim/LNL Licenses verilog or vhdl but not at the same time ■Mode|sim/PLUs Designer can simulate mixed Verilog VHDL at once Model sim/Se Premier version All the features of plus along with additional features

8 ModelSim Products ◼ ModelSim/VHDL or ModelSim/Verilog – OEM ◼ ModelSim/LNL – Licenses Verilog or VHDL but not at the same time ◼ ModelSim/PLUS – Designer can simulate mixed Verilog & VHDL at once ◼ ModelSim/SE – Premier version – All the features of PLUS along with additional features

Modelsim OEM Features a Complete Standards Support 87 VHDL 93 VHDL IEEE 1364-95 Verilog SDF1.0-3.0 ViTAL 2.2b VITAL 95 Easy-to-use Interface Common across platforms

9 ModelSim OEM Features ◼ Complete Standards Support – ‘87 VHDL – ‘93 VHDL – IEEE 1364-’95 Verilog – SDF 1.0 - 3.0 – VITAL 2.2b – VITAL ‘95 ◼ Easy-to-use Interface – Common across platforms

Simulation with Modelsim Model Technology

10 Simulation with ModelSim

刷新页面下载完整文档
VIP每日下载上限内不扣除下载券和下载次数;
按次数下载不扣除下载券;
注册用户24小时内重复下载只扣除一次;
顺序:VIP每日次数-->可用次数-->下载券;
相关文档